1. Field of the Invention
The present invention relates to a lithographic apparatus and a method for manufacturing a device.
2. Description of the Related Art
A lithographic apparatus may be used to apply a desired pattern onto a surface (e.g., a target portion of a substrate). Lithographic projection apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, a patterning structure may generate a circuit pattern corresponding to an individual layer of the IC, and this pattern can be imaged by a projection system onto a target portion (e.g., comprising one or more dies and/or portion(s) thereof) of a substrate (e.g., a wafer of silicon or other semiconductor material) that has been coated with a layer of radiation-sensitive material (e.g., resist). In general, a single wafer will contain a whole matrix or network of adjacent target portions that are successively irradiated via the projection system (e.g., one at a time).
Among current apparatus that employ patterning by a mask on a mask table, a distinction can be made between two different types of machine. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion at once. Such an apparatus is commonly referred to as a wafer stepper. In an alternative apparatus—commonly referred to as a step-and-scan apparatus—each target portion is irradiated by progressively scanning the mask pattern under the radiation beam in a given reference direction (the “scanning” direction) while synchronously scanning the substrate table parallel or anti-parallel to this direction; since, in general, the projection system will have a magnification factor M (generally <1), the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned. A radiation beam in a scanning type of apparatus may have the form of a slit with a slit width in the scanning direction. More information with regard to lithographic devices as here described can be gleaned, for example, from U.S. Pat. No. 6,046,792, which is incorporated herein by reference.
As stated above, in a manufacturing process using a lithographic projection apparatus, a pattern (e.g., in a mask) is imaged onto a substrate that is at least partially covered by a layer of radiation-sensitive material (e.g., resist). Prior to this imaging procedure, the substrate may undergo various other procedures such as priming, resist coating, and/or a soft bake. After exposure, the substrate may be subjected to other procedures such as a post-exposure bake (PEB), development, a hard bake, and/or measurement/inspection of the imaged features. This set of procedures may be used as a basis to pattern an individual layer of a device (e.g., an IC). For example, these transfer procedures may result in a patterned layer of resist on the substrate. One or more pattern processes may follow, such as deposition, etching, ion-implantation (doping), metallization, oxidation, chemo-mechanical polishing, etc., all of which may be intended to create, modify, or finish an individual layer. If several layers are required, then the whole procedure or a variant thereof, may be repeated for each new layer. Eventually, an array of devices will be present on the substrate (wafer). These devices are then separated from one another by a technique such as dicing or sawing, whence the individual devices can be mounted on a carrier, connected to pins, etc. Further information regarding such processes can be obtained, for example, from the book “Microchip Fabrication: A Practical Guide to Semiconductor Processing,” Third Edition, by Peter van Zant, McGraw Hill Publishing Co., 1997, ISBN 0-07-067250-4.
In the manufacturing process using a lithographic projection apparatus, a height map of the target portion that is to be exposed is measured. Based on these measurements, the position and/or the orientation of the substrate with respect to the optical elements is adjusted, e.g., by moving the substrate table on which the substrate is positioned. Since a substrate is not a perfectly flat object, it may not be possible to position the layer of resist exactly in the focal plane of the optics for the whole target portion, so the substrate may only be positioned as well as possible. In order to position the top surface of the substrate, or the layer of resist, in the focal plane as well as possible, the substrate table may be translated, rotated or tilted, in all degrees of freedom.
Adjusting the height and the tilt of the wafer table according to the surface topography of a substrate can level such changes in the topography. Non-correctable focus errors (NCE) are defined as changes in the wafer surface topography that cannot be completely compensated. For a static exposure, the non-correctable focus errors correspond directly to defocus errors. During a scanned exposure the non-correctable focus errors change continuously as the exposure slit is scanned over a particular position of the wafer. In the latter case, the average value of the non-correctable focus errors over the exposure time defines the average defocus that the position concerned experiences during the exposure.